Design and Implementation of a Green Traffic Light Controller on FPGA Using VHDL

被引：0

作者：

Sachdeva, Saumil ^{[1
]}

Chowdhury, Sarthak ^{[1
]}

Shekhar, Sushant ^{[1
]}

Verma, Gaurav ^{[1
]}

机构：

[1] Jaypee Inst Informat Technol, Dept Elect & Commun Engn, A-10,Sect 62, Noida, Uttar Pradesh, India

来源：

SYSTEM AND ARCHITECTURE, CSI 2015 | 2018年 / 732卷

关键词：

VHDL; FPGA; Traffic light; Clock gating;

D O I：

10.1007/978-981-10-8533-8_18

中图分类号：

TP18 [人工智能理论];

学科分类号：

081104 ; 0812 ; 0835 ; 1405 ;

摘要：

A traffic light system ensures that the flow of traffic remains smooth and balanced. For this purpose, a combination of various signs and devices is included in the system. A traffic light controller can be designed using either a microcontroller or a field programmable gate array, but since FPGA's are more flexible and fast than a microcontroller, the traffic light controller presented in this paper has been implemented on FPGA using VHDL. A modern traffic light system needs to be even more power efficient than the previous versions. So to reduce the power dissipation, the clock gating technique is applied in the design. Clock gating enables the clock only for those portions of circuitry that are active, thus reducing the dynamic power.

引用

页码：187 / 192

页数：6