MPEG-2 video data simulator: A case study in constrained HW-SW codesign

被引：0

作者：

Goswami, R ^{[1
]}

Srinivasan, V ^{[1
]}

Balakrishnan, M ^{[1
]}

机构：

[1] Cadence Design Syst, Noida, India

来源：

TWELFTH INTERNATIONAL CONFERENCE ON VLSI DESIGN, PROCEEDINGS | 1999年

关键词：

D O I：

10.1109/ICVD.1999.745136

中图分类号：

TP3 [计算技术、计算机技术];

学科分类号：

0812 ;

摘要：

An MPEG-2 video data simulator has been designed in a constrained design space. A hierarchical FSM model has been developed for MPEG-2 video data simulator. This model can be used for any sequence of moving pictures. This model was verified by behavioral (C-language) simulation for a particular cease (color-bars data and I I I picture sequence). After an evaluation of the implementation options available in our fairly constrained design space, firmware implementation was selected and implemented.

引用

页码：128 / 131

页数：4