Design and analysis of up-down counters

被引:0
|
作者
Segers, J [1 ]
Ebergen, JC [1 ]
机构
[1] UNIV WATERLOO,DEPT COMP SCI,WATERLOO,ON N2L 3G1,CANADA
关键词
D O I
10.1016/0167-6423(96)00005-6
中图分类号
TP31 [计算机软件];
学科分类号
081202 ; 0835 ;
摘要
Several designs for an up-down N-counter are derived for any N > 0. The up-down N-counter has a simple specification, but allows many non-trivial, efficient implementations. All designs are represented by means of a CSP-like program and are analyzed with respect to area, response time, and power consumption. Our final design has optimal area of Theta(log N), a bounded response time, and a bounded power consumption.
引用
收藏
页码:185 / 204
页数:20
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