Threshold voltage instabilities in high-k gate dielectric stacks

被引:211
|
作者
Zafar, S [1 ]
Kumar, A [1 ]
Gusev, E [1 ]
Cartier, E [1 ]
机构
[1] IBM Corp, Thomas J Watson Res Ctr, Div Res, Semicond Res & Dev Ctr, Yorktown Hts, NY 10598 USA
关键词
charge trapping; high k; hot carriers; NBTI; threshold voltage reliability;
D O I
10.1109/TDMR.2005.845880
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Over recent years, there has been increasing research and development efforts to replace SiO2 with high dielectric constant (high-kappa) materials such as HfO2, HfSiO2 and Al2O3. An important transistor reliability issue is the threshold voltage stability under prolonged stressing. In these materials, threshold voltage is observed to shift with stressing time and conditions, thereby giving rise to threshold voltage instabilities. In this paper, we review various causes of threshold voltage instability: charge trapping under positive bias stressing, positive charge creation under negative bias stressing (NBTI), hot-carrier stressing, de-trapping and transient charge trapping effects in high-kappa gate dielectric stacks. Experimental and modeling studies for these threshold voltage instabilities are reviewed.
引用
收藏
页码:45 / 64
页数:20
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