Single-Stage OTA Biased by Voltage-Combiners With Enhanced Performance Using Current Starving

被引:14
作者
Povoa, R. [1 ,2 ]
Lourenco, N. [1 ]
Martins, R. [1 ]
Canelas, A. [1 ]
Horta, N. [1 ]
Goes, J. [2 ]
机构
[1] Univ Lisbon, Inst Super Tecn, Inst Telecomunicacoes, ICG IT, P-1049001 Lisbon, Portugal
[2] Univ Nova Lisboa, Fac Ciencias & Tecnol, Dept Engn Electrotecn & Comp, CTS UNINOVA, P-2829516 Caparica, Portugal
关键词
Voltage-combiners; amplifier; OTA; single-stage; current starving; energy-efficiency; gain enhancement; CASCODE AMPLIFIER; FOLDED CASCODE; HIGH-SPEED; LOW-POWER;
D O I
10.1109/TCSII.2017.2777533
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
This brief presents an improved single-stage amplifier biased by voltage-combiners, through the proper usage of current starving. The topology designed and fabricated shows an enhancement of the low-frequency gain, an improvement in the establishing time due to enhanced gain-bandwidth product, and a high improvement of the energy efficiency. The circuit was optimized using AIDA-C, a state-of-the-art multi-objective multi-constraint analog IC sizing and optimization tool, and simulation results demonstrate that a gain above 60 dB and a figure-of-merit over 900 MHzxpF/mA are acquirable with this circuit, using the UMC 130-nm technology design kit. The circuit was fabricated and experimentally measured, presenting a gain of 58 dB with a figure-of-merit of 1102 MHzxpF/mA, for a 3.3 V supply source.
引用
收藏
页码:1599 / 1603
页数:5
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