First Demonstration of Ferroelectric Tunnel Thin-Film Transistor Nonvolatile Memory With Polycrystalline-Silicon Channel and HfZrOx Gate Dielectric

被引:6
作者
Ma, William Cheng-Yu [1 ]
Su, Chun-Jung [2 ]
Kao, Kuo-Hsing [3 ]
Lee, Yao-Jen [4 ]
Lin, Ju-Heng [1 ]
Wu, Pin-Hua [1 ]
Chang, Jui-Che [1 ]
Yen, Cheng-Lun [1 ]
Tseng, Hsin-Chun [1 ]
Liao, Hsu-Tang [1 ]
Chou, Yu-Wen [1 ]
Chiu, Min-Yu [1 ]
Chen, Yan-Qing [1 ]
机构
[1] Natl Sun Yat Sen Univ, Dept Elect Engn, Kaohsiung 804, Taiwan
[2] Natl Yang Ming Chiao Tung Univ, Dept Electrophys, Hsinchu 30010, Taiwan
[3] Natl Cheng Kung Univ, Dept Elect Engn, Tainan 701, Taiwan
[4] Natl Yang Ming Chiao Tung Univ, Inst Pioneer Semicond Innovat, Hsinchu 30010, Taiwan
关键词
Ferroelectric transistor; nonvolatile memory (NVM); polycrystalline-silicon (poly-Si) channel; thin-film transistor (TFT); tunnel transistor; FET;
D O I
10.1109/TED.2022.3208847
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
In this work, the nonvolatile memory constructed on the tunnel thin-film transistors (tunnel-TFTs) using polycrystalline-silicon channel featuring ferroelectric HfZrOx layer is demonstrated for the first time. When the pulse voltages of program (PG) and erase (ER) are, respectively, 3.5 and -2 V with the pulsewidth of 1 mu s, the threshold voltage modulation amount of the ferroelectric tunnel-TFT can reach -0.524 and 0.496 V, respectively. In addition, the endurance behaviors of the ferroelectric tunnel-TFT exhibit a strong PG/ER pulsewidth dependence. The wake- up effect of the ferroelectric layer becomes more pronounced as increasing the PG/ER pulsewidth. Moreover, the increase of the PG/ER pulsewidth also causes the ferroelectric tunnel-TFT to be subjected to the electrical dynamic stress effect, leading to the degradation of the subthreshold swing (SS) and the electron trapping effect. When the pulsewidth is 100 ns, the endurance is mainly dominated by the fatigue effect of the ferroelectric layer and the degradation of the SS. When the pulsewidth increases to 1 mu s, the endurance is mainly dominated by the electron trapping effect of the ferroelectric layer in addition to the fatigue effect. The retention of the ferroelectric tunnel-TFT exhibits stable behavior at 50 degrees C. Consequently, the ferroelectric tunnel-TFT exhibits sufficient electrical performance and can be integrated with display panels and various sensor systems on smart wearable devices for edge computing applications.
引用
收藏
页码:6072 / 6077
页数:6
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