Booth Algorithm with Implementation of UART Module using FPGA

被引：1

作者：

Mahamad, Abd Kadir ^{[1
,2
]}

Sidek, Azmi ^{[3
]}

Saon, Sharifah ^{[1
,2
]}

Kong, Kenneth Wong Fatt ^{[4
]}

Khan, Iqbal A. ^{[5
]}

机构：

[1] Univ Tun Hussein Onn Malaysia, Fac Elect & Elect Engn, Parit Raja 86400, Johor, Malaysia

[2] Univ Tun Hussein Onn Malaysia, Fac Elect & Elect Engn, Internet Things Focus Grp, Parit Raja 86400, Malaysia

[3] Univ Tun Hussein Onn Malaysia, Ctr Diploma Studies, Parit Raja 86400, Malaysia

[4] Iconix Consulting Sdn Bhd, Northpoint Off, A-3-2,1 Medan Syed Putra Utara, Kuala Lumpur 59200, Malaysia

[5] Umm Al Qura Univ, Dept Elect Engn, Mecca, Saudi Arabia

来源：

INTERNATIONAL JOURNAL OF INTEGRATED ENGINEERING | 2020年 / 12卷 / 02期

关键词：

FPGA; Booth multiplier; UART; VHDL; GUI;

D O I：

10.30880/ijie.2020.12.02.018

中图分类号：

T [工业技术];

学科分类号：

08 ;

摘要：

FPGA gives high level of flexibility to the user to rapidly construct and test any hardware. It has a lot of gates which are used depending upon the hardware to be implemented. These project aims at designing Booth multiplier using VHDL for signed bit multiplication in FPGA for high speed operations, developed and implemented of UART module required to enable two-way communication between the DE-2 board and computer. It is also designed GUI interface using MATLAB for sending data and enable the output of the process result to be displayed. The Booth multiplier was implemented using the algorithm in both signed and unsigned number and the input and output of the multiplication was successfully achieved and confirmed through simulation. The GUI was implemented and tested, which UART module also performed well for transmitting and receiving of 8-bit width data. In general, the objective of this project was successfully achieved, which, the result of the component part were able to be tested.

引用

页码：151 / 158

页数：8

共 25 条

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