Adaptive Spur Cancellation Technique in All-Digital Phase-Locked Loops

被引：4

作者：

Avivi, Rotem ^{[1
]}

Kerner, Michael ^{[1
]}

Shumaker, Evgeny ^{[1
]}

Li Puma, Giuseppe ^{[2
]}

Sela, Tami ^{[1
]}

Sofer, Lidor ^{[1
]}

Horovitz, Gil ^{[1
]}

机构：

[1] Intel Corp, IL-49527 Petah Tiqwa, Israel

[2] Intel Deutschland GmbH, D-47259 Duisburg, Germany

来源：

IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS | 2017年 / 64卷 / 11期

关键词：

Adaptive control; digital phase-locked loop (DPLL); local oscillator (LO); spur cancelation; PLL;

D O I：

10.1109/TCSII.2017.2650782

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

The phenomenon of periodic phase errors (also known as spurs) in phase-locked loops (PLLs) is widely acknowledged and is responsible for posing considerable challenge on development of miniaturized wireless communication devices. The common approach employed today for spur mitigation calls for a digital notch filter within the receive chain, while there is no similar digital scheme for the transmit chain. In addition, this notch filter is not perfect and usually degrades the overall receiver sensitivity. This brief puts forward a novel idea, which is to cancel the spurs inside the PLL such that the local oscillator signal and consequently TX and RX antenna ports become spur-free. The technique is based on a least-mean squares algorithm that features a self-learning capability. The method has been silicon proven in a digital PLL of a transceiver radio test chip realized in a standard nanoscale CMOS technology.

引用

页码：1292 / 1296

页数：5

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