Hardware-Software Co-design for BLDC Motor Speed Controller Design

被引:0
|
作者
Alecsa, Bogdan [1 ]
Onea, Alexandru [1 ]
机构
[1] Gheorghe Asachi Tech Univ, Automat Control & Appl Informat Dept, Blvd Mangeron 27, Iasi 700050, Romania
来源
ADVANCED MATERIALS RESEARCH II, PTS 1 AND 2 | 2012年 / 463-464卷
关键词
FPGA; BLDC; speed control; soft processors; hardware/software co-design;
D O I
10.4028/www.scientific.net/AMR.463-464.1256
中图分类号
T [工业技术];
学科分类号
08 ;
摘要
This paper proposes a combined hardware-software approach for a controller design. The case of a brushless DC (BLDC) motor speed controller is studied. A hardware controller is implemented inside a field programmable gate array (FPGA) device, together with soft core processors that implement by software non-critical tasks, like liquid crystal display (LCD) interface and serial data communication to a host computer. This way, the control algorithm is executed in hardware, as fast as possible, while the monitoring tasks are performed by the software. Experimental results are provided, showing the working design.
引用
收藏
页码:1256 / +
页数:2
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