A modelling-based methodology for evaluating the performance of a real-time embedded control system

被引:3
作者
Perko, Klemen [1 ]
Kocik, Remy [2 ]
Hamouche, Redha [2 ]
Trost, Andrej [3 ]
机构
[1] Sipronika Doo, SI-1000 Ljubljana, Slovenia
[2] Univ Paris Est, ESIEE Paris, Embedded Syst Dept, F-93162 Noisy Le Grand, France
[3] Univ Ljubljana, Fac Elect Engn, SI-1000 Ljubljana, Slovenia
关键词
Modelling; Model transformations; Embedded control systems design; Real-time systems; DESIGN SPACE EXPLORATION; LEVEL DESIGN; TRANSFORMATION;
D O I
10.1016/j.simpat.2011.03.008
中图分类号
TP39 [计算机的应用];
学科分类号
081203 ; 0835 ;
摘要
This paper presents a modelling-based methodology for embedded control system (ECS) design. Here, instead of developing a new methodology for ECS design, we propose to upgrade an existing one by bridging it with a methodology used in other areas of embedded systems design. We created a transformation bridge between the control-scheduling and the hardware/software (HW/SW) co-design tools. By defining this bridge, we allow for an automatic model transformation. As a result, we obtain more accurate timing-behaviour simulations, considering not only the real-time software, but also the hardware architecture's impact on the control performance. We show an example with different model-evaluation results compared to real implementation measurements, which clearly demonstrates the benefits of our approach. (C) 2011 Elsevier B.V. All rights reserved.
引用
收藏
页码:1594 / 1612
页数:19
相关论文
共 35 条
  • [1] *ATLAS GROUP, 2007, ATL ATLAS TRANSF LAN
  • [2] Metropolis: An integrated electronic system design environment
    Balarin, F
    Watanabe, Y
    Hsieh, H
    Lavagno, L
    Passerone, C
    Sangiovanni-Vincentelli, A
    [J]. COMPUTER, 2003, 36 (04) : 45 - +
  • [3] Balarin F., 1997, HARDWARE SOFTWARE CO
  • [4] BALASUBRAMANIAN D, ELECT COMMUNICATIONS, V1
  • [5] How does control timing affect performance?: Analysis and simulation of timing using Jitterbug and TrueTime
    Cervin, A
    Henriksson, D
    Lincoln, B
    Eker, J
    Årzén, KE
    [J]. IEEE CONTROL SYSTEMS MAGAZINE, 2003, 23 (03): : 16 - 30
  • [6] Cervin A., 2006, 2006 IEEE COMP AID C, P1194
  • [7] Czarnecki K., 2003, P 2 OOPSLA WORKSH GE, V45, P1
  • [8] A METHODOLOGY FOR SUPPORTING SYSTEM-LEVEL DESIGN SPACE EXPLORATION AT HIGHER LEVELS OF ABSTRACTION
    Dedic, Joze
    Finc, Matjaz
    Trost, Andrej
    [J]. JOURNAL OF CIRCUITS SYSTEMS AND COMPUTERS, 2008, 17 (04) : 703 - 727
  • [9] Taming heterogeneity the Ptolemy approach
    Eker, J
    Janneck, JW
    Lee, EA
    Liu, J
    Liu, XJ
    Ludvig, J
    Neuendorffer, S
    Sachs, S
    Xiong, YH
    [J]. PROCEEDINGS OF THE IEEE, 2003, 91 (01) : 127 - 144
  • [10] Farcas E, 2007, IEEE INT C EMERG, P1262