Lead Zirconium Titanate (PZT)-Based Gate-All-Around Negative-Capacitance Junctionless Nanowire FET for Distortionless Low-Power Applications

A negative-capacitance (NC)-induced junctionless gate-all-around (GAA) nanowire field-effect transistor (FET) is proposed by deploying the ferroelectric material (FE) lead zirconium titanate (PZT) between the gate electrode and metal, referred to as the NC JLNWFET. The FE material is used as a gate dielectric in addition to a high-K dielectric. The PZT gate stacking develops a negative capacitance owing to the alignment of dipoles with biasing, which is responsible for improving the direct-current (DC) and linearity performance compared with the conventional JLNWFET. The parameters I-ON, I-OFF, I-ON/I-OFF, and V-th are considered for the DC analysis, whereas g(m), g(m2), g(m3), and VIP2 are considered for the linearity analysis. The results show that I-ON and the I-ON/I-OFF ratio are improved in the NC JLNWFET by a factor of 12.5 and 6.38. The impact of design parameters such as the channel doping, drain voltage, and interface trap charge on the electrical performance and linearity parameters is analyzed in detail. The improvement in the linearity results in a distortionless structure. The high I-ON/I-OFF ratio and low V-th of the proposed structure mitigate the static and dynamic power in digital circuits and make the device suitable for use in low-power applications. Thus, the proposed NC JLNWFET can be used in distortionless and low-power applications.