1.5-V MOS translinear loops with improved dynamic range and their applications to current-mode signal processing

被引：29

作者：

De la Cruz-Blas, CA ^{[1
]}

Lopez-Martin, A ^{[1
]}

Carlosena, A ^{[1
]}

机构：

[1] Univ Publ Navarra, Dept Elect & Elect Engn, E-31006 Pamplona, Spain

来源：

IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS | 2003年 / 50卷 / 12期

关键词：

companding; current-mode circuits; MOS translinear loops; very low-voltage;

D O I：

10.1109/TCSII.2003.820230

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

Novel MOS translinear loop topologies for very low-voltage applications are presented. The inclusion of dc level shifting, together with a novel biasing scheme based on two MOS transistors in the triode region, allows the operation of the loops at supply voltages as low as V-GS+2V(DSat) maintaining at the same time a large dynamic range. Several current-mode translinear circuits, both static and dynamic, i.e., geometric mean, squarer/divider, multiplier and square-root-domain filters, are implemented following this approach, demonstrating on silicon the proposed techniques.

引用

页码：918 / 927

页数：10

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