Mapping Method Based Space Vector Modulation Technique for Diode Clamped Multilevel Inverters

This paper implements Space Vector Pulse Width Modulation (SVPWM) technique for Five level and Seven level Diode Clamped Inverters (5L-DCMLI and 7L-DCMLI). This technique is based on mapping methods where initially space vector is expressed as sum of a contender vector and an error vector. The contender vector is the one which is nearest to the reference space vector. An error vector is arrived by calculating vector difference of a contender vector from reference vector. The error vector is translated to origin of space vector diagram by using translation methods. For an n-level inverter, there will be (n-1) steps in space vector diagram. Since the amplitude of the error vector will be less than one step of the space vector diagram, two level space vector technique can be applied to it. The switching states thus obtained can be added to contender vector to get a vector which is very close to the reference vector and follows it in time. Simulation is carried out using MATLAB/Simulink and the performance results of SVPWM method of 5L-DCMLI and 7L-DCMLI are presented. The inverter is connected to Induction motor load and performance is evaluated.