High-Performance Integrated Dual-Gate AlGaN/GaN Enhancement-Mode Transistor

被引：80

作者：

Lu, Bin ^{[1
]}

Saadat, Omair Irfan ^{[1
]}

Palacios, Tomas ^{[1
]}

机构：

[1] MIT, Dept Elect Engn & Comp Sci, Cambridge, MA 02139 USA

来源：

IEEE ELECTRON DEVICE LETTERS | 2010年 / 31卷 / 09期

关键词：

AlGaN/GaN; dual-gate; enhancement-mode (E-mode); high-electron-mobility transistor (HEMT); power electronics;

D O I：

10.1109/LED.2010.2055825

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

In this letter, we present a new AlGaN/GaN enhancement-mode (E-mode) transistor based on a dual-gate structure. The dual gate allows the transistor to combine an E-mode behavior with low on-resistance and very high breakdown voltage. The device utilizes an integrated gate structure with a short gate controlling the threshold voltage and a long gate supporting the high-voltage drop from the drain. Using this new dual-gate technology, AlGaN/GaN E-mode transistors grown on a Si substrate have demonstrated a high threshold voltage of 2.9 V with a maximum drain current of 434 mA/mm and a specific on-resistance of 4.3 m Omega . cm(2) at a breakdown voltage of 643 V.

引用

页码：990 / 992

页数：3

共 14 条

[1]

Bin Lu, 2009, 2009 67th Annual Device Research Conference (DRC), P59, DOI 10.1109/DRC.2009.5354885

[2] High-performance enhancement-mode AlGaN/GaN HEMTs using fluoride-based plasma treatment [J].

Cai, Y ;

Zhou, YG ;

Chen, KJ ;

Lau, KM .

IEEE ELECTRON DEVICE LETTERS, 2005, 26 (07) :435-437

[3] Enhancement-mode AlN/GaN HFETs using Cat-CVD SiN [J].

Higashiwaki, Masataka ;

Mimura, Takashi ;

Matsui, Toshiaki .

IEEE TRANSACTIONS ON ELECTRON DEVICES, 2007, 54 (06) :1566-1570

[4] Enhancement-mode n-channel GaN MOSFETs on p-and n-GaN/sapphire substrates [J].

Huang, W. ;

Khan, T. ;

Chow, T. P. .

IEEE ELECTRON DEVICE LETTERS, 2006, 27 (10) :796-798

[5] Polarization effects, surface states, and the source of electrons in AlGaN/GaN heterostructure field effect transistors [J].

Ibbetson, JP ;

Fini, PT ;

Ness, KD ;

DenBaars, SP ;

Speck, JS ;

Mishra, UK .

APPLIED PHYSICS LETTERS, 2000, 77 (02) :250-252

[6] Normally Off GaN MOSFET Based on AlGaN/GaN Heterostructure With Extremely High 2DEG Density Grown on Silicon Substrate [J].

Im, Ki-Sik ;

Ha, Jong-Bong ;

Kim, Ki-Won ;

Lee, Jong-Sub ;

Kim, Dong-Seok ;

Hahm, Sung-Ho ;

Lee, Jung-Hee .

IEEE ELECTRON DEVICE LETTERS, 2010, 31 (03) :192-194

[7] Enhancement-Mode GaN MIS-HEMTs With n-GaN/i-AlN/n-GaN Triple Cap Layer and High-k Gate Dielectrics [J].

Kanamura, Masahito ;

Ohki, Toshihiro ;

Kikkawa, Toshihide ;

Imanishi, Kenji ;

Imada, Tadahiro ;

Yamada, Atsushi ;

Hara, Naoki .

IEEE ELECTRON DEVICE LETTERS, 2010, 31 (03) :189-191

[8] Recessed-gate enhancement-mode GaNHEMT with high threshold voltage [J].

Lanford, WB ;

Tanaka, T ;

Otoki, Y ;

Adesida, I .

ELECTRONICS LETTERS, 2005, 41 (07) :449-450

[9]

Lu B., 2008, P INT WORKSH NITR SE, P536

[10] Low On-Resistance High-Breakdown Normally Off AlN/GaN/AlGaN DHFET on Si Substrate [J].

Medjdoub, F. ;

Derluyn, J. ;

Cheng, K. ;

Leys, M. ;

Degroote, S. ;

Marcon, D. ;

Visalli, D. ;

Van Hove, M. ;

Germain, M. ;

Borghs, G. .

IEEE ELECTRON DEVICE LETTERS, 2010, 31 (02) :111-113

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