In Situ Aging-Aware Error Monitoring Scheme for IMPLY-Based Memristive Computing-in-Memory Systems

被引:9
作者
Xu, Jiarui [1 ]
Zhan, Yi [1 ]
Li, Yujie [1 ]
Wu, Jiajun [1 ]
Ji, Xinglong [2 ,3 ]
Yu, Guoyi [1 ]
Jiang, Wenyu [4 ]
Zhao, Rong [2 ,3 ,5 ,6 ]
Wang, Chao [1 ,7 ]
机构
[1] Huazhong Univ Sci & Technol, Sch Opt & Elect Informat, Wuhan 430074, Peoples R China
[2] Singapore Univ Technol & Design, Dept Engn & Prod Dev, Singapore 487372, Singapore
[3] Tsinghua Univ, Ctr Brain Inspired Comp Res, Beijing 100084, Peoples R China
[4] ASTAR, Inst Infocomm Res, Singapore 138632, Singapore
[5] Tsinghua Univ, Dept Precis Instruments, Beijing 100084, Peoples R China
[6] Tsinghua Univ, Innovat Ctr Future Chip, Beijing 100084, Peoples R China
[7] Huazhong Univ Sci & Technol, Wuhan Natl Lab Optoelect, Wuhan 430074, Peoples R China
基金
中国国家自然科学基金;
关键词
Memristors; Monitoring; Threshold voltage; Reliability; Logic gates; Degradation; Programming; Material implication (IMPLY) logic; memristor; in-situ error monitoring and detection; aging-induced degradation; computing-in-memory; logic-in-memory; edge computing; LOGIC; RELIABILITY;
D O I
10.1109/TCSI.2021.3095545
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Stateful logic through memristor is a promising technology to build Computing-in-Memory (CIM) systems. However, aging-induced degradation of memristors' threshold voltage imposes a major challenge to the reliability and guardbands estimation of memristive CIM systems, especially the Material Implication (IMPLY) logic based CIM systems. In this paper, a novel in-situ aging-aware error monitoring scheme for memristor-based IMPLY logic is proposed. The proposed in-situ error monitoring scheme can achieve faster error detection speed and higher detection accuracy than the straightforward program-verify monitoring scheme. Simulation results under Monte-Carlo simulation show that the proposed monitoring scheme can effectively detect the major operation failures existing in IMPLY logic operations with a detection accuracy up to 99.95%. Moreover, a case study of error monitoring design of 4-bit IMPLY-based adder is carried out. The analysis result exhibits that the proposed in-situ monitoring scheme can achieve 75.2% improvement on the detection speed against the program-verify scheme. Further analysis on a convolution filter in VGG-11 based Binarized Neural Network shows that 74% improvement on the detection speed can also be achieved by using the proposed monitoring scheme, which suggests that the proposed in-situ error monitoring scheme is an efficient solution to improve the reliability of IMPLY-based memristive CIM systems.
引用
收藏
页码:309 / 321
页数:13
相关论文
共 18 条
  • [1] Analog D., 2009, AMP INP OFFS VOLT DO
  • [2] 'Memristive' switches enable 'stateful' logic operations via material implication
    Borghetti, Julien
    Snider, Gregory S.
    Kuekes, Philip J.
    Yang, J. Joshua
    Stewart, Duncan R.
    Williams, R. Stanley
    [J]. NATURE, 2010, 464 (7290) : 873 - 876
  • [3] Electrical characterization and modeling of 1T-1R RRAM arrays with amorphous and poly-crystalline HfO2
    Grossi, Alessandro
    Zambelli, Cristian
    Olivo, Piero
    Crespo-Yepes, Alberto
    Martin-Martinez, Javier
    Rodriguez, Rosana
    Nafria, Monserrat
    Perez, Eduardo
    Wenger, Christian
    [J]. SOLID-STATE ELECTRONICS, 2017, 128 : 187 - 193
  • [4] Hubara I., 2016, Adv. Neural Inf. Process. Syst., V29, P1
  • [5] In-memory computing with resistive switching devices
    Ielmini, Daniele
    Wong, H. -S. Philip
    [J]. NATURE ELECTRONICS, 2018, 1 (06): : 333 - 343
  • [6] Jiarui Xu, 2020, Proceedings of the 2020 IEEE International Conference on Integrated Circuits, Technologies and Applications (ICTA), P110, DOI 10.1109/ICTA50426.2020.9332122
  • [7] A 1.08-nW/kHz 13.2-ppm/°C Self-Biased Timer Using Temperature-Insensitive Resistive Current
    Jung, Jaehong
    Kim, Ik-Hwan
    Kim, Seong-Jin
    Lee, Yoonmyung
    Chun, Jung-Hoon
    [J]. IEEE JOURNAL OF SOLID-STATE CIRCUITS, 2018, 53 (08) : 2311 - 2318
  • [8] Memristor-Based Material Implication (IMPLY) Logic: Design Principles and Methodologies
    Kvatinsky, Shahar
    Satat, Guy
    Wald, Nimrod
    Friedman, Eby G.
    Kolodny, Avinoam
    Weiser, Uri C.
    [J]. IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, 2014, 22 (10) : 2054 - 2066
  • [9] TEAM: ThrEshold Adaptive Memristor Model
    Kvatinsky, Shahar
    Friedman, Eby G.
    Kolodny, Avinoam
    Weiser, Uri C.
    [J]. IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, 2013, 60 (01) : 211 - 221
  • [10] 50 nm AlxOy ReRAM program 31% energy, 1.6x endurance, and 3.6x speed improvement by advanced cell condition adaptive verify-reset
    Ning, Sheyang
    Iwasak, Tomoko Ogura
    Takeuchi, Ken
    [J]. SOLID-STATE ELECTRONICS, 2015, 103 : 64 - 72