Hysteresis mechanisms of pentacene thin-film transistors with polymer/oxide bilayer gate dielectrics

We have studied the electrical stability of organic poly-4-vinyl phenol (PVP)/inorganic oxide bilayer gate dielectrics for low-voltage pentacene thin-film transistors (TFTs). Curing conditions of spin-cast PVP influence on the drain current-gate bias hysteresis behavior; long term curing reduces the magnitude of the hysteresis, which can also be reduced by decreasing the PVP thickness. The electron charge injection from gate electrode plays as another cause of the electrical hysteresis. These instabilities are categorized into the following three: channel/dielectric interface-induced, slow polarization-induced, and gate charge injection-induced hystereses. By examining the hysteresis behavior of pentacene TFTs with five different combinations of bilayer dielectric, we clarified the instability mechanisms responsible for the electrical hysteresis. (c) 2008 American Institute of Physics.