Reconfigurable Hardware Objects for Image Processing on FPGAs

被引：0

作者：

Kloub, Jan ^{[1
]}

Honzik, Petr ^{[1
]}

Danek, Martin ^{[1
]}

机构：

[1] Inst Informat Theory & Automat ASCR, Vodarenskou Vezi 4, Prague 18208 8, Czech Republic

来源：

PROCEEDINGS OF THE 13TH IEEE SYMPOSIUM ON DESIGN AND DIAGNOSTICS OF ELECTRONIC CIRCUITS AND SYSTEMS | 2010年

关键词：

D O I：

暂无

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

Embedded systems are getting more complex; that is why the high level of abstraction is required during the development process. High abstraction methods simplify implementation of complex computation systems and shorten the time to market. This paper presents an implementation of a graphic computing element (GCE) which can be used as a runtime parametrized building block in image processing applications in FPGAs. In terms of the object oriented model GCE encapsulates its internal data representation and rules for their manipulation. Several basic image processing operations have been implemented (Sobel edge detection, Gauss, mean, etc. filtering). These operations are called as GCE methods. Because of high spatial dependency of image data in image processing, an efficient image data reuse method has been implemented.

引用

页码：121 / 122

页数：2