Evaluating environmental factors for pre-layout board design

被引：5

作者：

Siddhaye, S ^{[1
]}

Sheng, P ^{[1
]}

机构：

[1] Univ Calif Berkeley, Dept Mech Engn, Berkeley, CA 94720 USA

来源：

PROCEEDINGS OF THE 1998 IEEE INTERNATIONAL SYMPOSIUM ON ELECTRONICS AND THE ENVIRONMENT | 1998年

关键词：

D O I：

10.1109/ISEE.1998.675039

中图分类号：

X [环境科学、安全科学];

学科分类号：

08 ; 0830 ;

摘要：

Product design for environment (DE) has been an X area of emerging interest for electronics manufacturers in recent years. An important aspect of DE is the linkage of manufacturing process waste emissions and energy consumption with parameters in product design. In this paper, a linkage is developed between the process wastes generated in printed circuit board (PCB) fabrication and board specifications. A set of process models for estimating waste mass quantities is combined with a multi-criteria health hazard evaluation scheme. A waste minimization formulation is presented for pre-layout board analysis. The emphasis of this formulation is on tiling of the boards on a panel and its impact on the waste stream generation but a special feature of the formulation is that it respects the functional requirements for the board design by incorporating them as the constraints of the waste optimization problem A PCB design for a multi-layer board is presented to show implementation of the procedure.

引用

页码：99 / 105

页数：7