Power optimization in data-path scheduling and binding with multiple supply voltages and threshold voltages by simulated annealing
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作者:
Huang, JF
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机构:
Tsinghua Univ, Dept Comp Sci & Technol, Beijing 100084, Peoples R ChinaTsinghua Univ, Dept Comp Sci & Technol, Beijing 100084, Peoples R China
Huang, JF
[1
]
Bian, JN
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机构:
Tsinghua Univ, Dept Comp Sci & Technol, Beijing 100084, Peoples R ChinaTsinghua Univ, Dept Comp Sci & Technol, Beijing 100084, Peoples R China
Bian, JN
[1
]
Liu, ZP
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机构:
Tsinghua Univ, Dept Comp Sci & Technol, Beijing 100084, Peoples R ChinaTsinghua Univ, Dept Comp Sci & Technol, Beijing 100084, Peoples R China
Liu, ZP
[1
]
Wang, YF
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机构:
Tsinghua Univ, Dept Comp Sci & Technol, Beijing 100084, Peoples R ChinaTsinghua Univ, Dept Comp Sci & Technol, Beijing 100084, Peoples R China
Wang, YF
[1
]
机构:
[1] Tsinghua Univ, Dept Comp Sci & Technol, Beijing 100084, Peoples R China
来源:
2005 INTERNATIONAL CONFERENCE ON COMMUNICATIONS, CIRCUITS AND SYSTEMS, VOLS 1 AND 2, PROCEEDINGS: VOL 1: COMMUNICATION THEORY AND SYSTEMS
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2005年
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D O I:
暂无
中图分类号:
TM [电工技术];
TN [电子技术、通信技术];
学科分类号:
0808 ;
0809 ;
摘要:
We present a scheme to optimize power consumption in data-path scheduling and binding with resources operating at multiple supply voltages and threshold voltages by simulated annealing. The proposed scheme considers both scheduling and binding simultaneously such that we will have a wider solution space to explore and a solution with much lower power can be obtained. Besides, we give a more accurate high-level power model that not only the dynamic and leakage power of function units but also the sharing of function units is taken into account. Experimental results on a number of high-level benchmark circuits using three supply voltage and threshold voltage levels show that an average power savings of about 68% can be obtained compared to using a single supply and threshold voltage level (with a time constraint of 1.2 times the critical path delay and a resource constraint of two function units each type).