Process Variation Model and Analysis for Domain Wall-Magnetic Tunnel Junction Logic

被引:0
作者
Hu, Xuan [1 ]
Edwards, Alexander J. [1 ]
Xiao, T. Patrick [2 ]
Bennett, Christopher H. [2 ]
Incorvia, Jean Anne C. [3 ]
Marinella, Matthew J. [2 ]
Friedman, Joseph S. [1 ]
机构
[1] Univ Texas Dallas, Dept Elect & Comp Engn, Richardson, TX 75083 USA
[2] Sandia Natl Laboraties, Alburquerque, NM USA
[3] Univ Texas Austin, Dept Elect & Comp Engn, Austin, TX 78712 USA
来源
2020 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS) | 2020年
基金
美国国家科学基金会;
关键词
domain wall; magnetic tunnel junction; device model; spintronic logic; process variation; MEMORY; MTJ;
D O I
暂无
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
The domain wall-magnetic tunnel junction (DW-MTJ) is a spintronic device that enables efficient logic circuit design because of its low energy consumption, small size, and non-volatility. Furthermore, the DW-MTJ is one of the few spintronic devices for which a direct cascading mechanism is experimentally demonstrated without any extra buffers; this enables potential design and fabrication of a large-scale DW-MTJ logic system. However, DW-MTJ logic relies on the conversion between electrical signals and magnetic states which is sensitive to process imperfection. Therefore, it is important to analyze the robustness of such DW-MTJ devices to anticipate the system reliability before fabrication. Here we propose a new DW-MTJ model that integrates the impacts of process variation to enable the analysis and optimization of DW-MTJ logic. This will allow circuit and device design that enhances the robustness of DW-MTJ logic and advances the development of energy-efficient spintronic computing systems.
引用
收藏
页数:5
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