Threshold voltage model of short-channel FD-SOI MOSFETs with vertical Gaussian profile

被引:49
作者
Zhang, Guohe [1 ]
Shao, Zhibiao [1 ]
Zhou, Kai [1 ]
机构
[1] Xi An Jiao Tong Univ, Dept Microelect, Xian 710049, Peoples R China
关键词
fully depleted (FD) silicon-on-insulator (SOI); MOSFETs; Gaussian; threshold voltage model;
D O I
10.1109/TED.2007.914832
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
A novel approximation of 2-D potential function perpendicular to the channel for fully depleted (FD) sificon-on-insulator (SOI) MOSFETs on films with vertical Gaussian profile is proposed in the paper, then an analytical threshold voltage model is derived. The model agrees well with the MEDICI numerical simulation results. It represents a feasible way to find the threshold voltage and gives some reference points in developing new 2-D models for nonuniform FD-SOI devices.
引用
收藏
页码:803 / 809
页数:7
相关论文
共 23 条
[1]  
[Anonymous], 1983, PHYS SEMICONDUCTOR D
[2]  
Borli H., 2007, P WORKSH COMP MOD NS, P505
[3]  
Fossum JG, 2002, 2002 IEEE INTERNATIONAL SOI CONFERENCE, PROCEEDINGS, P135, DOI 10.1109/SOI.2002.1044449
[4]  
HAMID HA, 2007, P WORKSH COMP MOD NS, P515
[5]   A physics-based analytic solution to the MOSFET surface potential from accumulation to strong-inversion region [J].
He, Jin ;
Chan, Mansun ;
Zhang, Xing ;
Wang, Yangyuan .
IEEE TRANSACTIONS ON ELECTRON DEVICES, 2006, 53 (09) :2008-2016
[6]   Threshold voltage model for mesa-isolated small geometry fully depleted SOI MOSFETs based on analytical solution of 3-D Poisson's equation [J].
Katti, G ;
DasGupta, N ;
DasGupta, A .
IEEE TRANSACTIONS ON ELECTRON DEVICES, 2004, 51 (07) :1169-1177
[7]   Two-dimensional analytical threshold voltage model of nanoscale fully depleted SOI MOSFET with electrically induced S/D extensions [J].
Kumar, MJ ;
Orouji, AA .
IEEE TRANSACTIONS ON ELECTRON DEVICES, 2005, 52 (07) :1568-1575
[8]  
LIOU JJ, 1994, ADV SEMICONDUCTOR DE
[9]   An analytic potential model for symmetric and asymmetric DG MOSFETs [J].
Lu, HX ;
Taur, Y .
IEEE TRANSACTIONS ON ELECTRON DEVICES, 2006, 53 (05) :1161-1168
[10]   On the scaling limit of ultrathin SOI MOSFETs [J].
Lu, WY ;
Taur, Y .
IEEE TRANSACTIONS ON ELECTRON DEVICES, 2006, 53 (05) :1137-1141