Accelerating the merge phase of sort-merge join

被引:14
作者
Papaphilippou, Philippos [1 ]
Pirk, Holger [1 ]
Luk, Wayne [1 ]
机构
[1] Imperial Coll London, Dept Comp, London, England
来源
2019 29TH INTERNATIONAL CONFERENCE ON FIELD-PROGRAMMABLE LOGIC AND APPLICATIONS (FPL) | 2019年
基金
英国工程与自然科学研究理事会;
关键词
Sort-merge join; stream processing; operators; database acceleration; high-throughput; FPGA; MPSoC; big data;
D O I
10.1109/FPL.2019.00025
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
We present an efficient, high-throughput and scalable hardware design for accelerating the merge phase of the sort-merge join operation. Sort-merge join is one of the fundamental join algorithms and among the most frequently executed operations in relational databases. It has been the focus of various recent pieces of research, each having different shortcomings and usually only focusing on the sort phase. In this paper, a new parallel sort-merge join architecture is developed, that provides data streaming functionality and high throughput. The key idea of the paper is the use of a novel design for a co-grouping engine, with which the input data are summarised on-the-fly. In this way, the operation is performed on streams of data, preserving the linear access pattern for faster data movement and also eliminates the need for a replay buffer/cache. In contrast to related work, our approach does not make assumptions about the value distribution of the input data and applies to any input size and width. We evaluate the design on a Zynq UltraScale+ based platform, and show that there is up to 3.1 times speedup over the host processor, even without accelerating the sort phase, while still taking into account the data transfers from and to main memory in Linux.
引用
收藏
页码:100 / 105
页数:6
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