Thermal-Aware Design for Approximate DNN Accelerators

被引:13
|
作者
Zervakis, Georgios [1 ]
Anagnostopoulos, Iraklis [2 ]
Salamin, Sami [1 ]
Spantidi, Ourania [2 ]
Roman-Ballesteros, Isai [3 ]
Henkel, Joerg [1 ]
Amrouch, Hussam [3 ]
机构
[1] Karlsruhe Inst Technol KIT, Dept Comp Sci, Chair Embedded Syst CES, D-76131 Karlsruhe, Germany
[2] Southern Illinois Univ Carbondale, Sch Elect Comp & Biomed Engn, Carbondale, IL 62901 USA
[3] Univ Stuttgart, Elect Engn Fac, Chair Semicond Test & Reliabil STAR Comp Sci, D-70569 Stuttgart, Germany
关键词
Approximate computing; deep neural networks; neural processing unit; reliability; systolic MAC array; temperature; thermal design; VLSI; MULTIPLIERS;
D O I
10.1109/TC.2022.3141054
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
Recent breakthroughs in Neural Networks (NNs) have made DNN accelerators ubiquitous and led to an ever-increasing quest on adopting them from Cloud to edge computing. However, state-of-the-art DNN accelerators pack immense computational power in a relatively confined area, inducing significant on-chip power densities that lead to intolerable thermal bottlenecks. Existing state of the art focuses on using approximate multipliers only to trade-off efficiency with inference accuracy. In this work, we present a thermal-aware approximate DNN accelerator design in which we additionally trade-off approximation with temperature effects towards designing DNN accelerators that satisfy tight temperature constraints. Using commercial multi-physics tool flows for heat simulations, we demonstrate how our thermal-aware approximate design reduces the temperature from 139 degrees C, in an accurate circuit, down to 79 degrees C. This enables DNN accelerators to fulfill tight thermal constraints, while still maximizing the performance and reducing the energy by around 75% with a negligible accuracy loss of merely 0.44% on average for a wide range of NN models. Furthermore, using physics-based transistor aging models, we demonstrate how reductions in voltage and temperature obtained by our approximate design considerably improve the circuit's reliability. Our approximate design exhibits around 40% less aging-induced degradation compared to the baseline design.
引用
收藏
页码:2687 / 2697
页数:11
相关论文
共 50 条
  • [31] FAST ALGORITHMS FOR THERMAL-AWARE FLOORPLANNING
    Wang, Lin
    JOURNAL OF CIRCUITS SYSTEMS AND COMPUTERS, 2014, 23 (07)
  • [32] Thermal-Aware Test Frequency Optimization
    Wang, Wei-Shen
    Liang, Zhe-Jia
    Li, James Chien-Mo
    Chang, Norman
    Kumar, Akhilesh
    Li, Ying-Shiun
    8TH INTERNATIONAL TEST CONFERENCE IN ASIA, ITC-ASIA 2024, 2024,
  • [33] Thermal-Aware Scheduling in Green Data
    Chaudhry, Muhammad Tayyab
    Ling, Teck Chaw
    Manzoor, Atif
    Hussain, Syed Asad
    Kim, Jongwon
    ACM COMPUTING SURVEYS, 2015, 47 (03)
  • [34] Precision and Performance-Aware Voltage Scaling in DNN Accelerators
    Rathore, Mallika
    Milder, Peter
    Salman, Emre
    PROCEEDINGS OF THE GREAT LAKES SYMPOSIUM ON VLSI 2023, GLSVLSI 2023, 2023, : 237 - 242
  • [35] Thermal-aware resource usage allocation
    Department of Computer Science and Technology, Tsinghua University, Beijing 100084, China
    Jisuanji Fuzhu Sheji Yu Tuxingxue Xuebao, 2009, 9 (1257-1263):
  • [36] A Thermal-aware Application Specific Routing Algorithm for Network-on-Chip Design
    Qian, Zhiliang
    Tsui, Chi-Ying
    2011 16TH ASIA AND SOUTH PACIFIC DESIGN AUTOMATION CONFERENCE (ASP-DAC), 2011,
  • [37] On the Design of Thermal-Aware Duty-Cycle MAC Protocol for IoT Healthcare
    Monowar, Muhammad Mostafa
    Alassafi, Madini O.
    SENSORS, 2020, 20 (05)
  • [38] Thermal-Aware Clock Tree Design to Increase Timing Reliability of Embedded SoCs
    Chakraborty, Ashutosh
    Duraisami, Karthik
    Sithambaram, Prassanna
    Macii, Alberto
    Macii, Enrico
    Poncino, Massimo
    IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, 2010, 57 (10) : 2741 - 2752
  • [39] Thermal-Aware Design and Management for Search-based In-Memory Acceleration
    Zhou, Minxuan
    Imani, Mohsen
    Gupta, Saransh
    Rosing, Tajana
    PROCEEDINGS OF THE 2019 56TH ACM/EDAC/IEEE DESIGN AUTOMATION CONFERENCE (DAC), 2019,
  • [40] Exploiting the Benefits of High-level Synthesis for Thermal-aware VLSI Design
    Chen, Jianqi
    Schafer, Benjamin Carrion
    2019 IEEE 37TH INTERNATIONAL CONFERENCE ON COMPUTER DESIGN (ICCD 2019), 2019, : 401 - 404