Simulation of real-time systems with clock calculus

被引:4
作者
Hu, Kai [1 ]
Zhang, Teng [2 ]
Yang, Zhibin [2 ,3 ]
Tsai, Wei-Tek [4 ]
机构
[1] Beihang Univ, State Key Lab Software Dev Environm, Beijing 100191, Peoples R China
[2] Beihang Univ, Sch Comp Sci & Engn, Beijing 100191, Peoples R China
[3] Univ Toulouse, IRIT CNRS, Toulouse, France
[4] Arizona State Univ, Sch Comp Informat & Decis Syst Engn, Tempe, AZ USA
关键词
SIGNAL; Clock calculus; Optimized clock tree; Code generation; PROGRAMMING LANGUAGE; DESIGN; POLYCHRONY; SEMANTICS;
D O I
10.1016/j.simpat.2014.10.010
中图分类号
TP39 [计算机的应用];
学科分类号
081203 ; 0835 ;
摘要
Safety critical real-time systems need to be modeled and simulated early in the development of lifecycle. SIGNAL is a data-flow synchronous language with clocks widely used in modeling of such systems. Due to the synchronous features of SIGNAL, clock calculus is essential in compilation and simulation. This paper proposes a new methodology for clock calculus that takes data dependencies into consideration. In this way, simulation code can be directly generated by using a depth-first traversal algorithm. In addition, a clock insertion method based on clock-implication checking is presented to obtain an optimized control structure. (C) 2014 Elsevier B.V. All rights reserved.
引用
收藏
页码:69 / 86
页数:18
相关论文
共 37 条
  • [1] AKERS SB, 1978, IEEE T COMPUT, V27, P509, DOI 10.1109/TC.1978.1675141
  • [2] AMAGBEGNON P, 1995, SIGPLAN NOTICES, V30, P163, DOI 10.1145/223428.207134
  • [3] Amagbegnon T.P., 1994, RR2290 INRIA
  • [4] [Anonymous], 2004, AS5506 SAE INT
  • [5] Barras B., 1997, COQ PROOF ASSISTANCT
  • [6] Berry G, 2000, FOUNDAT COMPUT, P425
  • [7] THE ESTEREL SYNCHRONOUS PROGRAMMING LANGUAGE - DESIGN, SEMANTICS, IMPLEMENTATION
    BERRY, G
    GONTHIER, G
    [J]. SCIENCE OF COMPUTER PROGRAMMING, 1992, 19 (02) : 87 - 152
  • [8] Berry G., 2000, ESTEREL V5 LANGUAGE
  • [9] Besnard L, 2004, SIGNAL V4 INRIA VERS
  • [10] Besnard L., 2009, RR6894 INRIA