C compiler design for a network processor

被引:9
|
作者
Wagner, J [1 ]
Leupers, R [1 ]
机构
[1] Univ Dortmund, Dept Comp Sci 12, Embedded Syst Grp, D-44221 Dortmund, Germany
关键词
bit-level addressing; code generation; compilers; network processors;
D O I
10.1109/43.959859
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
One important problem in code generation for embedded processors is the design of efficient compilers for target machines with application-specific architectures. This paper outlines the design of a C compiler for an industrial application-specific instruction-set processor (ASIP) for telecom applications. The target ASIP is a network processor with special instructions for bit-level access to data registers, which is required for packet-oriented communication protocol processing. From a practical viewpoint, we describe the main challenges in exploiting these application-specific features in a C compiler and we show how a compiler backend has been designed that accommodates these features by means of compiler intrinsics and a dedicated register allocator. The compiler is fully operational and first experimental results indicate that C-level programming of the ASIP leads to good code quality without the need for time-consuming assembly programming.
引用
收藏
页码:1302 / 1308
页数:7
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