共 8 条
[1]
Implementation of Single Artificial Neuron Using various Activation Functions and XOR Gate on FPGA chip
[J].
2015 SECOND INTERNATIONAL CONFERENCE ON ADVANCES IN COMPUTING AND COMMUNICATION ENGINEERING ICACCE 2015,
2015,
:118-123
[2]
Ide AN, 2006, FPGA IMPLEMENTATIONS OF NEURAL NETWORKS, P197, DOI 10.1007/0-387-28487-7_7
[3]
Kawamura S., 2016, SPRINGER, P620
[5]
Lu M, 2016, ASIA-PAC INT SYM ELE, P1115, DOI 10.1109/APEMC.2016.7522959
[6]
Makhlooghpour A, 2016, IEEE IJCNN, P192, DOI 10.1109/IJCNN.2016.7727198
[8]
Wan L, 2016, IR SIGN SYST C, P1, DOI DOI 10.1109/ISSC.2016.7528472