Bias Generation and Calibration of CMOS Charge Qubits at 3.5 Kelvin in 22-nm FDSOI

被引:2
作者
Bashir, Imran [1 ]
Leipold, Dirk [1 ]
Asker, Mike [1 ]
Esmailiyan, Ali [3 ]
Blokhina, Elena [2 ,3 ]
Redmond, David [3 ]
Giounanlis, Panagiotis [3 ]
Andrade-Miceli, Dennis [2 ,3 ]
Staszewski, Bogdan [2 ,3 ]
机构
[1] Equal1 Labs, Fremont, CA 94536 USA
[2] Univ Coll Dublin, Dublin 4, Ireland
[3] Univ Coll Dublin, NovaUCD, Equal1, Belfield Innovat Pk, Dublin 4, Ireland
来源
ESSCIRC 2021 - IEEE 47TH EUROPEAN SOLID STATE CIRCUITS CONFERENCE (ESSCIRC) | 2021年
关键词
Single-electron injection; cryogenic circuits; position-based charge qubit; quantum computer; quantum point contact (QPC); quantum dot (QD); fully depleted silicon-on-insulator (FD-SOI); WIDE TEMPERATURE-RANGE; DAC;
D O I
10.1109/ESSCIRC53450.2021.9567784
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
In this paper, we propose a fully integrated area-efficient bias generation system using a single input reference for a 2D quantum core structure comprising quantum dot arrays. The arrangement of biases initializes the quantum structure before a sophisticated quantum experiment can commence. The circuit area is 0.011 mm(2) and the power consumption is 220 mu W at 3.5 K with a 0.8 V supply in a 22 nm FD-SOI process. The proposed scheme can be readily extended to more complex quantum structures.
引用
收藏
页码:47 / 50
页数:4
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