共 6 条
[2]
A New Technique to Extract the Gate Bias Dependent S/D Series Resistance of Sub-100nm MOSFETs
[J].
PROCEEDINGS OF TECHNICAL PROGRAM: 2009 INTERNATIONAL SYMPOSIUM ON VLSI TECHNOLOGY, SYSTEMS AND APPLICATIONS,
2009,
:109-+
[3]
Packan P., 2009, 2009 IEEE International Electron Devices Meeting (IEDM 2009), DOI 10.1109/IEDM.2009.5424253
[4]
An efficient surface potential solution algorithm for compact MOSFET models
[J].
IEEE INTERNATIONAL ELECTRON DEVICES MEETING 2004, TECHNICAL DIGEST,
2004,
:755-758