Flipped Voltage Follower Low Dropout (LDO) Voltage Regulators: A Tutorial Overview

This tutorial introduces flipped voltage follower (FVF) based low dropout voltage regulators (LDOs) and their recent advances in the literature. Conventional stand-alone LDO ICs often deploy an external output capacitor in the range of hundreds of nanofarads to tens of microfarads with an inherent equivalent series resistance (ESR) in order to attain stability and low overshoot and undershoot during load transients. Because of the large value of the output capacitor, the bandwidth of the LDO is often limited, thus limiting the power supply rejection ratio (PSRR). Higher SoC integration and the necessity to reduce bill of materials cost has resulted in the proliferation of low-value on-chip capacitor LDOs. One of the major requirements of on-chip capacitor LDOs is to achieve high bandwidth and, thereby, good PSRR. An FVF is an analog voltage buffer circuit with fast local feedback, resulting in high bandwidth. It is capable of sourcing heavy current loads, which makes it an ideal candidate for LDOs. The architecture and design details, such as pole-zero equations, stability, and output impedance, of FVF LDOs are dealt with in detail in this tutorial.