A 27-35 GHz wideband PIN-diode limiter low noise amplifier MMIC with sub-2.4 dB noise figure

被引:4
作者
Yang, Lin [1 ]
Wang, Baozhu [1 ]
Zhang, Ming [1 ]
Zhang, Jing [2 ]
Wang, Xiaojun [1 ]
Li, Ronglin [3 ]
Ni, Yongjing [1 ]
机构
[1] Hebei Univ Sci & Technol, Sch Informat Sci & Engn, Shijiazhuang 050018, Peoples R China
[2] Shaanxi Univ Sci & Technol, Sch Elect Informat & Artificial Intelligence, Xi'an 710071, Peoples R China
[3] Hebei Bowei Integrated Circuits Co Ltd, Shijiazhuang 050000, Peoples R China
来源
MICROELECTRONICS JOURNAL | 2022年 / 126卷
关键词
Limiter-LNA; Low noise amplifier; PIN diode; Noise figure; pHEMT; LNA; BANDWIDTH; CODESIGN;
D O I
10.1016/j.mejo.2022.105507
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
In this paper, a thorough co-design procedure for the integrated PIN-diode limiter and low noise amplifier (LNA) is presented. A 27 GHz-35 GHz wideband integrated limiter low noise amplifier (limiter-LNA) is fabricated with the combined PIN/0.15-mu m-pHEMT technology for millimeter-wave radar applications. The PIN-diode limiter and the LNA are co-designed to improve the small signal performance. To improve the noise performance and the input-matching of the limiter-LNA, a novel limiter design method with the modified lossy TL model is presented. The measurement results illustrate that the small-signal gain is 20 +/- 0.7 dB, the noise figure (NF) is 1.9 dB-2.4 dB, the output power at 1 dB compression point (OP1dB) is larger than 12.1 dBm and the dc power consumption is only 96-mW. The limiter-LNA is capable of handling 38 dBm continuous wave (CW) input-power without failure. The chip area including testing pads is 2.3 mm x 1.0 mm.
引用
收藏
页数:6
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