An 0.3-μm Si epitaxial base BiCMOS technology with 37-GHz fmax and 10-V BVceo for RF telecommunication

In this paper, an 0.3-mu m BiCMOS technology for mixed analog/digital application is presented. A typical emitter area of this technology is 0.3 mu m x 1.0 mu m. This technology includes high f(max) of 37 GHz at the low collector current of 300 mu A and high BV(ceo) of 10 V NPN transistor, CMOS with L(eff) = 0.3 mu m, and passive elements. By using the shallow and deep trench isolation technology and nonselective epitaxial intrinsic base, the C(jc) can be reduced to 1.6 fF, which is the lowest value reported so far. As a results, we have managed to obtain the high f(max) at the low current region and high BV(ceo) concurrently. These features will contribute to the development of highperformance BiCMOS LSI's for various mixed analog/digital applications.