Wafer-Level Monolithic Integration of Vertical Micro-LEDs on Glass

被引:20
|
作者
Guo, Wei [1 ]
Meng, Hu [1 ]
Chen, Youru [1 ]
Sun, Tuo [1 ]
Li, Yanzhao [1 ]
机构
[1] BOE Technol Grp Co Ltd, Cent Res Inst, Beijing 100176, Peoples R China
关键词
Micro-LED; wafer bonding; glass backplane; light extraction; GAN; CONTACT;
D O I
10.1109/LPT.2020.2991672
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
In an earlier study micro-LED micro display (<1 inch) on silicon CMOS backplane was demonstrated for augmented reality (AR) applications. Here we report the feasibility of wafer-level monolithic integration of micro-LEDs on glass substrate/backplane. Such issues as the cracking of GaN epitaxial layer, the deviation of alignment, and the peeling of insulator are discussed. SU-8 is proposed as the insulator material in vertical micro-LEDs, resulting into improved light extraction efficiency and allowing for the reduced light crosstalk between sub pixels if the integrated reflective mirrors are used. A directly driven micro-LED parallel array with a resolution of 320 x 720 with individual LED size ranging from 5 mu m to 28 mu m is demonstrated. It is believed that this monolithic technology on glass will play an important role in future high performance and low cost wearable and/or phone displays.
引用
收藏
页码:673 / 676
页数:4
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