A robust, input voltage adaptive and low energy consumption level converter for sub-threshold logic

被引:40
作者
Shao, Hui [1 ]
Tsui, Chi-Ying [1 ]
机构
[1] Hong Kong Univ Sci & Technol, Dept Elect & Comp Engn, Hong Kong, Hong Kong, Peoples R China
来源
ESSCIRC 2007: PROCEEDINGS OF THE 33RD EUROPEAN SOLID-STATE CIRCUITS CONFERENCE | 2007年
关键词
D O I
10.1109/ESSCIRC.2007.4430306
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
A new level converter (LC) is proposed for logic voltage shifting between sub-threshold voltage to normal high voltage. By employing 2 PMOS diodes, the LC shows good operation robustness with sub-threshold logic input. The switching delay of the proposed LC can adapt with the input logic voltage which is more suitable for power aware systems. With a simpler circuit structure, the energy consumption of the LC is smaller than that of the existing sub-threshold LC. Simulation results demonstrate the performance improvement and energy reduction of the proposed LC. Test chip was fabricated using 0.18 mu m CMOS process. Measurement results show that our proposed LC can operate correctly with an input at as low as 127mV and an output voltage at 1.8V.
引用
收藏
页码:312 / 315
页数:4
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