BooleDozer: Logic synthesis for ASICs

被引:40
作者
Stok, L
Kung, DS
Brand, D
Drumm, AD
Sullivan, AJ
Reddy, LN
Hieter, N
Geiger, DJ
Chao, HH
Osler, PJ
机构
[1] IBM CORP,SYST TECHNOL & ARCHITECTURE DIV,ROCHESTER,MN 55901
[2] IBM CORP,E FISHKILL FACIL,MICROELECT DIV,HOPEWELL JCT,NY 12533
[3] IBM CORP,MICROELECT DIV,ROCHESTER,MN 55901
[4] IBM CORP,MICROELECT DIV,BURLINGTON FACIL,ESSEX JCT,VT 05452
关键词
D O I
10.1147/rd.404.0407
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
Logic synthesis is the process of automatically generating optimized logic-level representation from a high-level description. With the rapid advances in integrated circuit technology and the resultant growth in design complexity, designers increasingly rely on logic synthesis to shorten the design time while achieving performance objectives, This paper describes the IBM logic synthesis system BooleDozer(TM), including its organization, main algorithms, and how it fits into the design process, The BooleDozer logic synthesis system has been widely used within IBM to successfully synthesize processor and ASIC designs.
引用
收藏
页码:407 / 430
页数:24
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