Design of logic control for micro-power A/D with a serial interface using FPGA

被引：0

作者：

Well Xv ^{[1
]}

Hu Bing ^{[1
]}

Wang Wenbin ^{[1
]}

机构：

[1] Xihua Univ, Sch Elect & Informat Engn, Chengdu 610039, Peoples R China

来源：

ICEMI 2007: PROCEEDINGS OF 2007 8TH INTERNATIONAL CONFERENCE ON ELECTRONIC MEASUREMENT & INSTRUMENTS, VOL IV | 2007年

关键词：

low power consumption; serial interface; A/D conversion; FPGA; embedded microprocessor; power quality monitor;

D O I：

暂无

中图分类号：

TP39 [计算机的应用];

学科分类号：

081203 ; 0835 ;

摘要：

To realize the low-power consumption and miniaturization of the remote power quality monitor, a kind of parallel multi-channel acquisition scheme using micro-power A/D with a serial interface is presented. After the designing ideas of total acquisition scheme based embedded microprocessor is introduced in the paper, the implementation of complex logic control for the micro-power A/D using FPGA is given in detail, and the correctness of sequential design to control the A/D is verified by simulation experiments with EDA tool. The scheme also has great practical values for the design of portable test instrument.

引用

页码：870 / 873

页数：4

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