Advanced 2D/3D ESD device simulation - A powerful tool already used in a pre-Si phase

被引：25

作者：

Esmark, K ^{[1
]}

Stadler, W ^{[1
]}

Wendel, M ^{[1
]}

Gossner, H ^{[1
]}

Guggenmos, X ^{[1
]}

Fichtner, W ^{[1
]}

机构：

[1] Infineon Technol AG, DAT LIB IO, D-81609 Munich, Germany

来源：

ELECTRICAL OVERSTRESS/ELECTROSTATIC DISCHARGE SYMPOSIUM PROCEEDINGS, 2000 | 2000年

关键词：

D O I：

10.1109/EOSESD.2000.890111

中图分类号：

TP3 [计算技术、计算机技术];

学科分类号：

0812 ;

摘要：

The tremendous advantages of adequate 2D/3D device simulations for ESD optimization are demonstrated. The pre-silicon ESD-protection concept of a new CMOS technology was completely based on high-current IV characteristics simulated for different NMOS variations. Silicon verification proved the excellent simulation quality of the electrical behavior and, furthermore, of ESD thresholds.

引用

页码：420 / 429

页数：4

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