An FPGA-Based High-Throughput Keypoint Detection Accelerator Using Convolutional Neural Network for Mobile Robot Applications

被引：2

作者：

Li, Jingyuan ^{[1
]}

Liu, Ye ^{[1
]}

Huang, Kun ^{[1
]}

Zhou, Liang ^{[1
]}

Chang, Liang ^{[1
]}

Zhou, Jun ^{[1
]}

机构：

[1] Univ Elect Sci & Technol China, Sch Informat & Commun Engn, Chengdu, Peoples R China

来源：

2022 IEEE ASIA PACIFIC CONFERENCE ON POSTGRADUATE RESEARCH IN MICROELECTRONICS AND ELECTRONICS, PRIMEASIA | 2022年

关键词：

keypoint detection; CNN; FPGA; hardware Accelerator; VIO; ROBUST;

D O I：

10.1109/PRIMEASIA56064.2022.10104021

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

Keypoint detection is a key procedure for Visual-Inertial Odometry (VIO). In recent years, Convolutional Neural Network (CNN) has been introduced to enhance the robustness of keypoint detection. However, the high computational complexity and memory usage make them difficult to be deployed to edge platforms for high-throughput mobile robot applications such as Unmanned Aerial Vehicles (UAVs) and Autonomous Mobile Robots (AMRs). In this work, we proposed an FPGA-based high-throughput keypoint detection accelerator using CNN with algorithm-hardware co-design, including a lightweight keypoint detection neural network and a dedicated hardware accelerator architecture. Implemented on a Xilinx ZCU104 FPGA board, the proposed accelerator is able to perform keypoint detection at 94 FPS for 640x480 input image with a low ATE, outperforming the state-of-the-art designs.

引用

页码：81 / 84

页数：4

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