A 2.4GHz 1.8-V CMOS Sub-Harmonic Mixer with Inherent Harmonic-Rejection

被引:0
作者
Gilasgar, Mitra [1 ]
机构
[1] Guilan Univ, Dept Elect Engn, Rasht, Iran
来源
UKSIM-AMSS FIRST INTERNATIONAL CONFERENCE ON INTELLIGENT SYSTEMS, MODELLING AND SIMULATION | 2010年
关键词
Sub-Harmonic Mixer; Harmonic Rejection; CMOS; Wireless;
D O I
暂无
中图分类号
TP301 [理论、方法];
学科分类号
081202 ;
摘要
This paper presents a novel low power high linear sub-harmonic mixer for direct-down conversion receivers, in which an inductive connection between RF and LO stages is proposed to improve the linearity and enhance the gain of Mixer. This is a novel mixer that not only frequency translates the RF signal to baseband directly but also avoids the need for a discrete filter by attenuating the third and fifth harmonics using the harmonic rejection structure. The proposed core uses 1/2 x LO generation scheme to overcome LO self-mixing and IMD2 related problems common in conventional Direct Conversion Receivers. Simulation results performed by Advanced Design System (ADS) in 0.18 mu m TSMC CMOS process show a voltage conversion gain of 15.57dB, an overall double side band noise figure of 6.88dB, input referred 1dB compression point of -11.5dBm and IIP3 of 1.5dBm while draining 4.2mA from 1.8V supply.
引用
收藏
页码:406 / 411
页数:6
相关论文
共 17 条
[1]  
CHEN HC, 2007, IEEE J SOLID STATE C, V42
[2]  
FANG SJ, 2002, 2002 INT S CIRC SYST, V4, P807
[3]  
KLUMPERIN EAM, 2004, IEEE J SOLID STAET C, V39
[4]  
KRIZHANOVSKII V, 2004, IEEE 14 INT CRIM C M
[5]  
KWON I, 2005, IEEE MICROWAVE WIREL, V15
[6]  
Lee Kyeongho, 2000, IEEE S VLSI CIRC
[7]  
MATINPOUR B, 1999, RFIC S 1999 IEEE JUN, V2, P25
[8]  
PERUMANA BG, 2005, SUBHARMONIC CMOS MIX
[9]  
ROSE S, 2002, THESIS UC BERKELEY
[10]  
RUDELL JC, 1997, IEEE J SOLID STATE C, V32