Guaranteed scheduling for switches with configuration overhead

被引:72
作者
Towles, B [1 ]
Dally, WJ [1 ]
机构
[1] Stanford Univ, Dept Elect Engn, Comp Syst Lab, Stanford, CA 94305 USA
基金
美国国家科学基金会;
关键词
optical switches; packet switching;
D O I
10.1109/TNET.2003.818190
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
In this paper, we present three algorithms that provide performance guarantees for scheduling switches, such as optical switches, with configuration overhead. Each algorithm emulates an unconstrained (zero overhead) switch by accumulating a batch of configuration requests and generating a corresponding schedule for a constrained switch. Speedup is required both to cover the configuration overhead of the switch and to compensate for empty slots left by the scheduling algorithm. Scheduling algorithms are characterized by the number of configurations N-s they require to cover a batch of requests and the speedup required to compensate for empty slots S-min. Initially, all switch reconfiguration is assumed to occur simultaneously. We show that a well-known exact matching algorithm, EXACT, leaves no empty slots (i.e., S-min = 1), but requires N-s approximate to N-2 configurations for an N-port switch leading to high configuration overhead or large batches and, hence, high delay. We present two new algorithms that reduce the number of configurations required substantially. MIN covers a batch of requests in the minimum possible number of configurations, N-s = N, but at the expense of many empty slots, Smin approximate to 4 log(2) N. DOUBLE strikes a balance, requiring twice as many configurations, N-s = 2N, while reducing the number of empty slots so that S-min = 2. Loosening the restriction on reconfiguration times, the scheduling problem is cast as an open shop. The best known practical scheduling algorithm for open shops, list scheduling (LIST), gives the same emulation requirements as DOUBLE. Therefore, we conclude that our architecture gains no advantages from allowing arbitrary switch reconfiguration. Finally, we show that DOUBLE and LIST offer the lowest required speedup to emulate an unconstrained switch across a wide range of port count and delay.
引用
收藏
页码:835 / 847
页数:13
相关论文
共 23 条
[1]  
AGRANAT AJ, 1999 DIG LEOS SUMM T, P61
[2]   Scheduling of an input-queued switch to achieve maximal throughput [J].
Altman, E ;
Liu, Z ;
Righter, R .
PROBABILITY IN THE ENGINEERING AND INFORMATIONAL SCIENCES, 2000, 14 (03) :327-334
[3]  
[Anonymous], 1997, APPROXIMATION ALGORI
[4]  
CHANG CS, 2000, P IEEE INFOCOM 2000, P1614
[5]  
CHEN M, 1991, P IEEE GLOBECOM 91, P1276
[6]   ON EDGE COLORING BIPARTITE GRAPHS [J].
COLE, R ;
HOPCROFT, J .
SIAM JOURNAL ON COMPUTING, 1982, 11 (03) :540-546
[7]  
FOUQUET JE, 1988, P IEEE LEOS ANN M OR, P169
[8]  
GONZALEZ T, 1976, J ACM, V23, P665, DOI 10.1145/321978.321985
[9]   MINIMIZING THE NUMBER OF SWITCHINGS IN AN SS TDMA SYSTEM [J].
GOPAL, IS ;
WONG, CK .
IEEE TRANSACTIONS ON COMMUNICATIONS, 1985, 33 (06) :497-501
[10]   BOUNDS ON MULTIPROCESSING TIMING ANOMALIES [J].
GRAHAM, RL .
SIAM JOURNAL ON APPLIED MATHEMATICS, 1969, 17 (02) :416-&