A 60 GHz LOW POWER DIRECT-CONVERSION QUADRATURE-PHASE TRANSMITTER IN 130 nm CMOS WITH LOW PROFILE CAVITY BACKED ANTENNA

This article presents the analysis, design, and implementation of a 60 GHz transmitter in 130 nm bulk CMOS, focusing on low power and high performance applications. The low power transmitter lineup consists of two double-balanced Gilbert-cells with dynamic current injection, on chip FGCPW meandering ring-hybrid balun, Lange coupler, combiner, preamplifier, and low power transformer coupled power amplifier. A planar antenna with above 6 dB gain is also implemented. The measured output -1 dB compression point of the power amplifier is 9.6 dBm with 8.6 dB gain, and the 3 dB bandwidth is from 47 to 67 GHz (power amplifier) while drawing 90 mA from a 1.2 V supply. The mixer, preamplifer, and drive amplifier consume 12, 26, and 68 mA, respectively. The transmitter up-converting an IF of 200 MHz to RF at 60.2 GHz achieve a total gain of 17.17 dB (simulated 21.09 dB) and saturation power higher than 9.53 dBm. (c) 2015 Wiley Periodicals, Inc. Microwave Opt Technol Lett 57:785-789, 2015