A timing-driven floorplanning algorithm with the Elmore delay model for building block layout

被引:1
作者
Koide, T [1 ]
Wakabayashi, S [1 ]
机构
[1] Hiroshima Univ, Fac Engn, Higashihiroshima 7398527, Japan
关键词
building block layout; floorplanning; Elmore delay; nonlinear programming; topological constraint;
D O I
10.1016/S0167-9260(98)00016-9
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
This paper presents a timing-driven floorplanning algorithm for building block layout. As the interconnection delay model, the proposed algorithm adopts the Elmore delay model. The algorithm consists of two phases. In the first phase, a timing-driven topological arrangement of blocks is generated with the resolution of overlap among blocks using nonlinear programming under the timing constraints. In the second one, the algorithm performs floorplan sizing which determines the sizes and the shapes of blocks based on the topological arrangement obtained in the first phase so as to minimize the chip area, and obtains a legal floorplan. This phase is based on the topological constraint manipulation. Through the experimental results, the proposed algorithm can produce results without any timing violations within a practical computation time. (C) 1999 Elsevier Science B.V. All rights reserved.
引用
收藏
页码:57 / 76
页数:20
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