Performance Bound Analysis of Analog Circuits Considering Process Variations

被引:0
作者
Hao, Zhigang [1 ,2 ]
Tan, Sheldon X. -D. [1 ]
Shen, Ruijing [1 ]
Shi, Guoyong [2 ]
机构
[1] Univ Calif Riverside, Dept Elect Engn, Riverside, CA 92521 USA
[2] Shanghai Jiao Tong Univ, Sch Microelect, Shanghai 200240, Peoples R China
来源
PROCEEDINGS OF THE 48TH ACM/EDAC/IEEE DESIGN AUTOMATION CONFERENCE (DAC) | 2011年
基金
中国国家自然科学基金;
关键词
performance bound; symbolic; interval; process variation; TOLERANCE ANALYSIS; SYMBOLIC ANALYSIS;
D O I
暂无
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
In this paper, we propose a new performance bound analysis of analog circuits considering process variations. We model the variations of component values as intervals measured from tested chip and manufacture processes. The new method applies a graph-based symbolic analysis and affine interval arithmetic to derive the variational transfer functions of analog circuits (linearized) with variational coefficients in forms of intervals. Then the frequency response bounds (maximum and minimum) are obtained by performing analysis of a finite number of transfer functions given by the Kharitonov's polynomial functions. We show that symbolic de-cancellation is critical for the affine interval analysis. The response bound given by the Kharitonov's functions are conservative given the correlations among coefficient intervals in transfer functions. Experimental results demonstrate the effectiveness of the proposed compared to the Monte Carlo method.
引用
收藏
页码:310 / 315
页数:6
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