Capacitor-Less 4F2 DRAM Using Vertical nGaAs Junction for Ultimate Cell Scalability

被引:3
作者
Kim, Joon Pyo [1 ]
Sim, Jaeho [1 ]
Bidenko, Pavlo [1 ]
Geum, Dae-Myeong [1 ]
Kim, Seong Kwang [1 ]
Shim, Joonsup [1 ]
Kim, Jongmin [2 ]
Kim, Sanghyeon [1 ]
机构
[1] Korea Adv Inst Sci & Technol KAIST, Sch Elect Engn, Daejeon 34141, South Korea
[2] Korea Adv Nano Fab Ctr KANC, Div Device Technol, Suwon 16499, South Korea
基金
新加坡国家研究基金会;
关键词
DRAM; epitaxial growth; impact ionization; InGaAs biristor; npn junction; BIRISTOR;
D O I
10.1109/LED.2022.3204436
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
In this work, we demonstrated capacitor-less 4F(2) 2-terminal InGaAs npn junction DRAM through careful device design. Using epitaxially grown InGaAs which have a steep junction, fabricated InGaAs bistable resistor (biristor) DRAM showed low voltage operation (similar to 2 V), fast switching speed (<:20 ns), long-term retention (10(3) s at 85 degrees C), and high endurance (>10(10) cycles) with a high sensing margin. Considering this feasibility study, we believe that InGaAs n(+)pn(+) junction DRAM could be a good technological option for future scalable 3D DRAM.
引用
收藏
页码:1834 / 1837
页数:4
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