An Intrinsically Linear Wideband Polar Digital Power Amplifier

被引:33
作者
Hashemi, Mohsen [1 ]
Shen, Yiyu [2 ]
Mehrpoo, Mohammadreza [3 ]
Alavi, Morteza S. [2 ]
de Vreede, Leo C. N. [4 ]
机构
[1] Delft Univ Technol, ELCA Grp, Microelect, NL-2628CD Delft, Netherlands
[2] Delft Univ Technol, Elect Engn, NL-2628CD Delft, Netherlands
[3] Delft Univ Technol, Microelect, NL-2628CD Delft, Netherlands
[4] Delft Univ Technol, NL-2628CD Delft, Netherlands
关键词
Class-E/F2; digital power amplifier (DPA); digital pre-distortion (DPD)-less; efficient; linear; multiphase RF clocking; nonlinear sizing; overdrive-voltage control; wideband; NM CMOS; TRANSMITTER; EFFICIENCY; DESIGN; MODULATOR; DAC; DBM;
D O I
10.1109/JSSC.2017.2737647
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
This paper presents an intrinsically linear wideband polar digital power amplifier (DPA) operating in semi class-E/F-2 mode. Without using any type of digital pre-distortion (DPD), the proposed architecture achieves high linearity by accurately controlling its AM-AM and AM-PM characteristic curves through nonlinear sizing, overdrive-voltage control, and multiphase RF clocking without compromising the achievable output power or efficiency. Measurement results of the fabricated prototype in 40-nm bulk CMOS show -46 and -40 dBc adjacent channel power ratio (ACPR) for 20- and 40-MHz orthogonal frequency-division multiplexing (OFDM) signals, respectively. The measured error vector magnitudes (EVM) are -36 dB and -33 dB, respectively. Measured results indicate a P-SAT, peak drain efficiency (DE), and power-added efficiency (PAE) of 14.6 dBm, 44%, and 26%, respectively, using a 0.5-V supply for the output stage at 2.2 GHz.
引用
收藏
页码:3312 / 3328
页数:17
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