Reliable Reconfiguration Controller for Fault-Tolerant Embedded Systems on Multi-FPGA platforms

被引:6
作者
Bolchini, C. [1 ]
Fossati, L. [2 ]
Codinachs, D. Merodio [2 ]
Miele, A. [1 ]
Sandionigi, C. [1 ]
机构
[1] Politecn Milan, Dip Elettron & Informaz, Pzza L da Vinci 32, I-20133 Milan, Italy
[2] European Space Agcy, NL-2200 AG Noordwijk, Netherlands
来源
2010 IEEE 25TH INTERNATIONAL SYMPOSIUM ON DEFECT AND FAULT TOLERANCE IN VLSI SYSTEMS (DFT 2010) | 2010年
关键词
Hard/Soft Errors; Fault Tolerance; Multi-FPGA platforms; Reconfiguration; SINGLE-EVENT UPSET;
D O I
10.1109/DFT.2010.30
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
This paper proposes the design of a controller managing the fault tolerance of multi-FPGA platforms, contributing to the creation of a reliable system featuring high flexibility and resource availability. A fault management strategy that exploits the devices' reconfiguration capabilities is proposed; the Reconfiguration Controller, focus of this paper, is the main component in charge of implementing such strategy. The innovative points raised by this work are 1) the identification of a distributed control architecture, allowing the avoidance of single points of failure, 2) the management of both recoverable and non-recoverable faults, and 3) the definition of an overall reliable multi-FPGA system.
引用
收藏
页码:191 / 199
页数:9
相关论文
共 22 条
[1]  
[Anonymous], 2007, P IEEE INT PAR DISTR, DOI DOI 10.1109/IPDPS.2007.370363
[2]  
Bayar S., 2008, P HIPEAC WORKSH REC
[3]   Design Space Exploration for the Design of Reliable SRAM-based FPGA Systems [J].
Bolchini, Cristiana ;
Miele, Antonio .
23RD IEEE INTERNATIONAL SYMPOSIUM ON DEFECT AND FAULT-TOLERANCE IN VLSI SYSTEMS, PROCEEDINGS, 2008, :332-340
[4]  
Carmichael C., 2000, XAPP216 XIL INC
[5]  
Claus C, 2008, I C FIELD PROG LOGIC, P534
[6]  
Clausen C. A., 2007, Document - International Research Group on Wood Protection, P1
[7]   Two novel approaches to online partial bitstream relocation in a dynamically reconfigurable system [J].
Corbetta, S. ;
Ferrandi, F. ;
Morandi, M. ;
Novati, M. ;
Santambrogio, M. D. ;
Sciuto, D. .
IEEE COMPUTER SOCIETY ANNUAL SYMPOSIUM ON VLSI, PROCEEDINGS: EMERGING VLSI TECHNOLOGIES AND ARCHITECTURES, 2007, :457-+
[8]  
Cuoccio A, 2008, DELTA 2008: FOURTH IEEE INTERNATIONAL SYMPOSIUM ON ELECTRONIC DESIGN, TEST AND APPLICATIONS, PROCEEDINGS, P279, DOI 10.1109/DELTA.2008.35
[9]   Fault-tolerant voting mechanism and recovery scheme for TMR FPGA-based systems [J].
D'Angelo, S ;
Metra, C ;
Pastore, S ;
Pogutz, A ;
Sechi, GR .
1998 IEEE INTERNATIONAL SYMPOSIUM ON DEFECT AND FAULT TOLERANCE IN VLSI SYSTEMS, PROCEEDINGS, 1998, :233-240
[10]   Fast run-time fault location in dependable FPGA-based applications [J].
Huang, WJ ;
Mitra, S ;
McCluskey, EJ .
2001 IEEE INTERNATIONAL SYMPOSIUM ON DEFECT AND FAULT TOLERANCE IN VLSI SYSTEMS, PROCEEDINGS, 2001, :206-214