Chipyard: Integrated Design, Simulation, and Implementation Framework for Custom SoCs

被引:149
作者
Amid, Alon [1 ]
Biancolin, David [1 ]
Gonzalez, Abraham [1 ]
Grubb, Daniel [1 ]
Karandikar, Sagar [1 ]
Liew, Harrison [1 ]
Magyar, Albert [2 ]
Mao, Howard [2 ]
Ou, Albert [2 ]
Pemberton, Nathan [1 ]
Rigge, Paul [2 ]
Schmidt, Colin [2 ]
Wright, John [1 ]
Zhao, Jerry [2 ]
Shao, Yakun Sophia [2 ]
Asanovic, Krste [2 ]
Nikolic, Borivoje [2 ]
机构
[1] Univ Calif Berkeley, Dept Elect Engn & Comp Sci, Berkeley, CA 94720 USA
[2] Univ Calif Berkeley, Berkeley, CA 94720 USA
关键词
Generators; Open source software; Rockets; IP networks; Hardware; Physical design; Tools;
D O I
10.1109/MM.2020.2996616
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
Continued improvement in computing efficiency requires functional specialization of hardware designs. Agile hardware design methodologies have been proposed to alleviate the increased design costs of custom silicon architectures, but their practice thus far has been accompanied with challenges in integration and validation of complex systems-on-a-chip (SoCs). We present the Chipyard framework, an integrated SoC design, simulation, and implementation environment for specialized compute systems. Chipyard includes configurable, composable, open-source, generator-based IP blocks that can be used across multiple stages of the hardware development flow while maintaining design intent and integration consistency. Through cloud-hosted FPGA accelerated simulation and rapid ASIC implementation, Chipyard enables continuous validation of physically realizable customized systems.
引用
收藏
页码:10 / 20
页数:11
相关论文
共 24 条
  • [1] Ajayi T., 2019, PROC 56 ACMIEEE AUTO
  • [2] Asanovic K., 2016, The Rocket Chip Generator
  • [3] Asanovic Krste., 2015, BERKELEY OUT OF ORDE
  • [4] OpenPiton: An Open Source Manycore Research Framework
    Balkind, Jonathan
    McKeown, Michael
    Fu, Yaosheng
    Tri Nguyen
    Zhou, Yanqi
    Lavrov, Alexey
    Shahrad, Mohammad
    Fuchs, Adi
    Payne, Samuel
    Liang, Xiaohua
    Matl, Matthew
    Wentzlaff, David
    [J]. ACM SIGPLAN NOTICES, 2016, 51 (04) : 217 - 232
  • [5] INVITED: The Case for Embedded Scalable Platforms
    Carloni, Luca P.
    [J]. 2016 ACM/EDAC/IEEE DESIGN AUTOMATION CONFERENCE (DAC), 2016,
  • [6] Chang E, 2018, IEEE CUST INTEGR CIR
  • [7] ASAP7: A 7-nm finFET predictive process design kit
    Clark, Lawrence T.
    Vashishtha, Vinay
    Shifren, Lucian
    Gujja, Aditya
    Sinha, Saurabh
    Cline, Brian
    Ramamurthy, Chandarasekaran
    Yeric, Greg
    [J]. MICROELECTRONICS JOURNAL, 2016, 53 : 105 - 115
  • [8] Cook H., 2017, P 1 WORKSHOP COMP AR
  • [9] Das Sarma D., 2019, HOT CHIPS 31 STANFOR
  • [10] Farshchi F., 2019, INTEGRATING NVIDIA D