The design, analysis, and simulation of an optimized all-optical AND gate using a Y-shaped plasmonic waveguide for high-speed computing devices

被引:22
作者
Anguluri, Surya Pavan Kumar [1 ]
Banda, Srinivas Raja [1 ]
Krishna, Sabbi Vamshi [2 ]
Swarnakar, Sandip [3 ]
Kumar, Santosh [4 ,5 ]
机构
[1] Godavari Inst Engn & Technol, Dept Elect & Commun Engn, Rajahmundry 533296, Andhra Pradesh, India
[2] Ravindra Coll Engn Women, Dept Elect & Commun Engn, Nandikotkur Rd, Kurnool 518452, Andhra Pradesh, India
[3] G Pullaiah Coll Engn & Technol, Dept Elect & Commun Engn, Photon Lab, Nandikotkur Rd, Kurnool 518002, Andhra Pradesh, India
[4] DIT Univ, Dept Elect & Elect & Commun Engn, Dehra Dun 248009, Uttarakhand, India
[5] Liaocheng Univ, Sch Phys Sci & Informat Technol, Shandong Key Lab Opt Commun Sci & Technol, Liaocheng 252059, Shandong, Peoples R China
关键词
All-optical logic gates; Metal-insulator-metal waveguide; Y-combiner; Linear interference; Plasmonic; FDTD; LOGIC GATES; XOR;
D O I
10.1007/s10825-021-01748-x
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
All-optical logic gates have proven their significance in the digital world for the implementation of high-speed computations. We propose herein a novel structure for an all-optical AND gate using the concept of a power combiner based on a Y-shaped metal-insulator-metal waveguide with a 4 mu m x 7 mu m footprint. This design works based on the principle of linear interference. The insertion loss and extinction ratio of the design are given as 0.165 and 14.11 dB, respectively. The design is analyzed by using the finite-difference time-domain (FDTD) method and verified using MATLAB. The minimized structure can be used to design any complex logic circuit to achieve better performance in the future.
引用
收藏
页码:1892 / 1899
页数:8
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