Principal component analysis-based object detection/recognition chip for wireless interconnected three-dimensional integration

To develop image detection/recognition systems for various types of multiobjects that operate in real-time/real-world with small-size hardware and low-power dissipation, three-demensional (3-D) integration Of multichips is required. We have designed a complementary metal oxide semiconductor (CMOS) test chip for object detection/recognition utilizing the processing algorithm based on the eigenface method and wireless chip-to-chip interconnections. Furthermore, a 3-D integration system was designed utilizing wireless chip-to-chip interconnections of parallel inductor-coupled local wireless interconnect (LWI) for 5.3 Gbps image data transfer, and antenna-coupled global wireless interconnect (GWI) for 500 Mbps clock and command distribution. With the prospect of realizing enhanced system performance using 0.18 mu m CMOS chips, object detection/recognition times of 580 mu s for detection and 4.2 mu s for one-to-one recognition, and 40 giga operation per second (GOPS) processing capabilities at a 250 MHz clock frequency were obtained.