Modeling of Through-Silicon-Via (TSV) RF Characterization using a simplified RLC electrical model

被引:0
作者
Tseng, Kun-Fu [1 ]
Lu, Ching-Ta [2 ]
机构
[1] Asia Pacific Inst Creat, Dept Multimedia & Game Sci, Miaoli, Taiwan
[2] Asia Univ, Dept Informat Commun, Taichung, Taiwan
来源
PROCEEDINGS OF 2016 INTERNATIONAL CONFERENCE ON APPLIED SYSTEM INNOVATION (ICASI) | 2016年
关键词
Through Silicon Via (TSV); Three dimensional (3D) integration; S parameter;
D O I
暂无
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
This study proposes a simplified RF electrical model for advance chip design circuits using through Silicon via (TSV) interconnection which is passed through complicated material layers in three dimensional (3D) stacks. The structure of TSVs are usually combined with bumps and redistribution layers (RDLs) to achieve its function. The model to describe the TSVs electrical characteristic can be seemed as RLC schematic circuit response to input signal, so an electrical model based on analytical RLC is proposed, and an analytic circuit analysis simulator (ADS) is employed to verify the accuracy of scattering parameter (S parameter) with a 3D electromagnetic field solver (HESS).
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页数:4
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