Baseband MIMO receiver architecture for MC-CDMA and its FPGA implementation

被引：0

作者：

LaRoche, Isabelle ^{[1
]}

Roy, Sebastien ^{[1
]}

Fortier, Paul ^{[1
]}

Beaumont, Jean-Francois ^{[2
]}

机构：

[1] Univ Laval, Dept Elect & Comp Engn, Quebec City, PQ G1V 0A6, Canada

[2] Def Res Dev Canada, Ottawa, ON K1A 0Z4, Canada

来源：

2010 IEEE 6TH INTERNATIONAL CONFERENCE ON WIRELESS AND MOBILE COMPUTING, NETWORKING AND COMMUNICATIONS (WIMOB) | 2010年

关键词：

PERFORMANCE; SYSTEMS;

D O I：

10.1109/WIMOB.2010.5644864

中图分类号：

TP [自动化技术、计算机技术];

学科分类号：

0812 ;

摘要：

A baseband multi-input, multi-output (MIMO) multi-carrier code division multiple access (MC-CDMA) downlink system meeting wideband CDMA (WCDMA) bandwidth requirements is simulated and its receiver part is implemented into a field programmable gate array (FPGA). The receiver was designed by integrating an existing single-input, single-output (SISO) fixed-point MC-CDMA receiver with an existing floating-point MIMO receiver. The receiver employs temporal multiplexing in order to use a single Vertical Bell Laboratories LAyered Space-Time (V-BLAST) detector. Simulation results of a complete MIMO MC-CDMA system show improvements over the SISO case. Implementation results show that it is possible to implement this receiver design into a single FPGA device.

引用

页码：749 / 752

页数：4

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